AMD Llano, First AMD Fusion Processor |
AMD in the event of in-house Technical Forum yesterday show the example of first Fusion processor that is included into a type of APU (which stands for Accelerated Processing Unit - a combination of GPU and CPU) called AMD Fusion Llano. CPU and the hybrid graphics are given a full workload and it can perform video decode 1080p Blu-ray smoothly, calculate Pi up to decimal 32 million and generate particle effects using the graphic and the function of GPU chip not a general CPU / main processor.
A check of statistics DirectComputer see it running at about 30 GigaFLOPS for velocity joint, or several times faster than what would be a normal processor.
Llano Design is targeted for the desktop and notebook in normal size and will have as many as four cores in addition to 11 DirectX (OpenGL 4.0) graphics core that is integrated directly into the architecture. AMD has promised that this platform will be one of the first 32nm designs and will run significantly faster than even cooler than 45nm hardware used today.
The current roadmap of AMD schedules the first Llano processors will soon be marketed in the first half year of 2011 and it can make AMD Llano will be the direct competitor for Sandy Bridge the Intel architecture where the graphic will be embedded in the main chip.
A check of statistics DirectComputer see it running at about 30 GigaFLOPS for velocity joint, or several times faster than what would be a normal processor.
Llano Design is targeted for the desktop and notebook in normal size and will have as many as four cores in addition to 11 DirectX (OpenGL 4.0) graphics core that is integrated directly into the architecture. AMD has promised that this platform will be one of the first 32nm designs and will run significantly faster than even cooler than 45nm hardware used today.
The current roadmap of AMD schedules the first Llano processors will soon be marketed in the first half year of 2011 and it can make AMD Llano will be the direct competitor for Sandy Bridge the Intel architecture where the graphic will be embedded in the main chip.
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